I’ve been working to implement FAST9 corner detection on the Pixy. I was able to get the stock code to compile and run using Keil and process the raw frame data within progvideo.cpp by including the FAST C code from http://www.edwardrosten.com/work/fast.html.
cam_getFrameWithoutChirp(CAM_GRAB_M1R2, 0, 0, CAM_RES2_WIDTH, CAM_RES2_HEIGHT, g_chirpUsb); //cprintf("%d,%d\n", CAM_RES2_WIDTH, CAM_RES2_HEIGHT); 320 x 200 //frames have a header of length 36 uint8_t len = 36; uint8_t *frame = len + (uint8_t *)SRAM1_LOC; int val; //convert to greyscale using filter for (int i = 1 + CAM_RES2_WIDTH; i<(CAM_RES2_WIDTH*CAM_RES2_HEIGHT - CAM_RES2_WIDTH - 1); i++){ val = 0; val += 1*(frame[i + -1 - CAM_RES2_WIDTH]); val += 2*(frame[i + 0 - CAM_RES2_WIDTH]); val += 1*(frame[i + 1 - CAM_RES2_WIDTH]); val += 2*(frame[i + -1]); val += 4*(frame[i + 0]); val += 2*(frame[i + 1]); val += 1*(frame[i + -1 + CAM_RES2_WIDTH]); val += 2*(frame[i + 0 + CAM_RES2_WIDTH]); val += 1*(frame[i + 1 + CAM_RES2_WIDTH]); val = val / 16; frame[i] = (uint8_t) val; } int ret_num_corners; xy ret_nonmax[MAX_CORNERS]; xy *fast9results; fast9results = fast9_detect_nonmax(frame, CAM_RES2_WIDTH, CAM_RES2_HEIGHT, CAM_RES2_WIDTH, (uint8_t) 40, &ret_num_corners, ret_nonmax); cprintf("corners = %d\n", ret_num_corners); for (int i=0; i<ret_num_corners; i++){ frame[fast9results[i].y*CAM_RES2_WIDTH + fast9results[i].x] = (uint8_t) 255; //cprintf("corner[%d]: (%d,%d) \n", i, fast9results[i].x, fast9results[i].y); //break; } cam_sendFrameChirp((uint8_t *)SRAM1_LOC, (uint32_t) len + (uint16_t) CAM_RES2_WIDTH * (uint16_t) CAM_RES2_HEIGHT, g_chirpUsb);
I ran into some trouble with malloc calls in the FAST9 code and ended up just allocating fixed arrays. However, I can’t track more than ~50 corners at the moment because (I think) I am storing my arrays in a working memory area… I would like to add a fixed block of memory to store the candidate corners but I haven’t figured this out yet.
In “pixyvals.h”, I see some predefined memory addresses:
// SRAM banks #define SRAM0_LOC 0x10000000 #define SRAM0_SIZE 0x20000 #define SRAM1_LOC 0x10080000 #define SRAM1_SIZE 0x12000 #define SRAM2_LOC 0x20000000 #define SRAM2_SIZE 0x8000 #define SRAM3_LOC 0x20008000 #define SRAM3_SIZE 0x4000 #define SRAM4_LOC 0x2000c000 #define SRAM4_SIZE 0x4000
I tried to define a few more regions in between these blocks:
#define SRAM5_LOC 0x10030000 #define SRAM5_SIZE 0x20000 #define SRAM6_LOC 0x10050000 #define SRAM6_SIZE 0x20000
This doesn’t seem to work yet.
I’m curious why you left gaps in the predefined memory locations and if you think there’s a better approach that I could be following.
Thanks,
Robb