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Pixy Protocol Question

Pixy Software
#1

Regarding the SPI interface, what is the maximum SCLK that the PIXY will accept? I understand cable length will affect this, but what is the theoretical max? 1/8 it’s Peripheral clock? I’m hoping to drive it with an FPGA.

Also regarding the confusing byte order,
http://cmucam.org/projects/cmucam5/wiki/Porting_Guide

  1. under the ‘Serial Protocol’ header it says:

“All values in the object block are 16-bit words, sent least-signifcant byte first (little endian). So, for example, to send the sync word 0xaa55, you need to send 0x55 (first byte) then 0xaa (second byte).”

But the 0xaa55 is never sent by the host, only sent from the Pixy, correct? Shouldn’t it read 'The Pixy will send 0x55 (first byte) then 0xaa (second byte)."

  1. However, in the ‘SPI tries its best to confuse things’ section, it says:
    “To save CPU, Pixy configures its SPI controller with 16-bit words instead of 8. This works great, but the 16-bit words are sent big-endian instead of little-endian.”

Since the actual code says also says Pixy data is sent ‘big endian’, is the little endian that #1 refers to only for UART and big endian from the Pixy for SPI?

#2

ben nguyen wrote:

Regarding the SPI interface, what is the maximum SCLK that the PIXY will accept? I understand cable length will affect this, but what is the theoretical max? 1/8 it’s Peripheral clock? I’m hoping to drive it with an FPGA.

Also regarding the confusing byte order,
http://cmucam.org/projects/cmucam5/wiki/Porting_Guide

  1. under the ‘Serial Protocol’ header it says:

“All values in the object block are 16-bit words, sent least-signifcant byte first (little endian). So, for example, to send the sync word 0xaa55, you need to send 0x55 (first byte) then 0xaa (second byte).”

But the 0xaa55 is never sent by the host, only sent from the Pixy, correct? Shouldn’t it read 'The Pixy will send 0x55 (first byte) then 0xaa (second byte)."

Agreed, this is confusing!

  1. However, in the ‘SPI tries its best to confuse things’ section, it says:
    “To save CPU, Pixy configures its SPI controller with 16-bit words instead of 8. This works great, but the 16-bit words are sent big-endian instead of little-endian.”

Since the actual code says also says Pixy data is sent ‘big endian’, is the little endian that #1 refers to only for UART and big endian from the Pixy for SPI?

The UART and I2C doesn’t have a 16-bit mode, so everything is sent little endian. SPI is a confusing exception. It’s data is sent big endian. Sorry about the confusion.

Edward